1. The condition of two planes or parallel lines. Important in disk drives because a lack of it in mechanical assemblies can result in positioning inaccuracy. More precisely: planes-coplanar; lines-colinear.
2. Is the local variation in disk thickness measured independently of thickness itself.
3. The ability of a multiprocessor computer to allocate more than one processor (CPU) to a computing problem, where each CPU works on a separate problem or separate segment of that problem. Also referred to as parallel processing.
A simple method of data error detection that always makes numbers either odd or even, using an extra bit in which the total number of binary 1s (or 0s) in a byte is always odd or even. Thus, in an odd parity scheme, every byte has eight bits of data and one parity bit. If using odd parity and the number of 1 bits comprising the byte of data is not odd, the ninth or parity bit is set to 1 to create the odd parity. In this way, a byte of data can be checked for accurate transmission by simply counting the bits for an odd parity indication. If the count is ever even, an error is indicated.
A logical section of a disk drive, each of which becomes a logical device with a drive letter.
Also known as PCMCIA
Personal Computer Memory Card International Association. PCMCIA is an organization consisting of some 500 companies that has developed a standard for small, credit card-sized devices, called PC Cards. Originally designed for adding memory to portable computers, the PCMCIA standard has been expanded several times and is now suitable for many types of devices. There are in fact four types of PCMCIA cards. All four have the same rectangular dimensions, 85.6 by 54 millimeters, but differ in thickness:
The shifting in time of the zero-slope portion of a read-back voltage from the values contained in the write current waveform. Sometimes incorrectly used to describe bit jitter.
Auxiliary memory, displays, printers, scanners and other equipment usually attached to a computer system through either controllers or cables. They are often packaged together in a desktop computer.
PHASE LOCKED LOOP (PLL)
A circuit whose output locks onto and tracks the frequency of an input signal. Sometimes incorrectly called a data separator.
Measure in degrees of the amount of difference between excursions from the window center where flux reversals can occur and the edge of the data window. Similar to window margin.
The smallest grouping of data on the hard disk; always 512 bytes.
Programmable Input Output. A means of accessing device registers. Also describes one form of data transfers. PIO data transfers are performed by the host processor using PIO register accesses to the data register.
Cycle times range from 600ns to 150ns using modern EIDE disk drives. The following is a description of the PIO transfer procedure:
- The system specifies the location where the data transfer is to begin, and how many sectors to transfer.
- The system then sends a command to transfer the data.
- The drive sets DRQ (Data ReQuest) when it is ready to transfer the data. READ: The drive does not set DRQ until it has a sector of data ready. The drive also asserts the INTRQ (INTerrupt ReQuest)line when the data is ready.
WRITE: The drive sets DRQ but does not issue an interrupt until after the data is transferred.
- The CPU transfers 256 words of data by asserting IOR- (IO Read) or IOW- (IO Write) 256 times. 5) If more data than one sector was requested, the drive/CPU will repeat steps 3 and 4 until all data has been transferred.
This is a quick and efficient way to transfer data, but it ties up the CPU allot. PIO Multiple Mode – (AKA: Multi-Block Mode or just Block Mode) Multiple mode transfers are handled similarly to a standard PIO data transfer. The only difference is how often the drive issues interrupts. In standard PIO, each sector (512 bytes) of data transferred, requires one interrupt. With Multiple Mode, we can transfer 2, 4, 8, 16 or more sectors with each interrupt. For instance, if multiple mode is set to 4, each interrupt indicates the drive is ready for 4 sectors of data (read), or has completed the transfer of 4 sectors of data (write). The advantage is that we eliminate some of the system overhead involved in a PIO transfer, Here is a chart indicating the number of interrupts (AKA: Blocks) involved in the transfer of a 1 megabyte file (1,048,576 bytes):
From this table we see that by setting the Multiple Block Mode to 16, we eliminate 1920 (2048-128) interrupts. This shows a significant decrease in the time the drive is waiting on the system. The newer the drive the higher # of Sect/Int it can handle. If you set the blocks higher than the drive is capable of, it is the same as setting it to 1. Cycle Times as per ATA Specs:
|Mode||Cycle Times||Transfer Rate|
|Single Word DMA|
|Mode||Cycle Times||Transfer Rate|
|Mode||Cycle Times||Transfer Rate|
Actual drive cycle times are approximations, as the transfer rate is calculated on a per block basis. Variables such as Error Correction, Caching, Processor Overhead, and Rotational Speed will account for variations in the minimum cycle time the drive can handle. In order to achieve these higher transfer rates, both the drive, the motherboard’s BIOS and the IDE bus must support IOCHRDY (I/O Channel Ready). On newer drives and systems, these values are presumed to be available.
PLATED THIN FILM MEDIA
Magnetic disk memory media having its surface plated with a thin coating of a metallic alloy instead of being coated with oxide.
Magnetic disk memory media. Each platter (disk) has two surfaces, the top and bottom surface. Each surface has it’s own R/W Head for reading, writing and erasing data.
PLUG AND PLAY (PnP)
The Plug and Play specification was developed by Microsoft in cooperation with the Intel Corporation as well as a number of other hardware manufacturers. The primary focus of Plug and Play is to develop hardware (a computer and its internal components) and software that will work together to automatically configure the hardware devices and automatically calculate and assign system resources. This will allow hardware changes and additions without the need for manual resource assignment or tweaking. As the name suggests, the goal is to be able to just plug in a new device and immediately be able to use it, without complicated setup procedures. PnP for PCs became a reality with the release of Windows 95 and PC hardware designed to work with it.
POST (Power On Self-Test)
In a computer system based on one of Intel’s x86 processors or compatibles, program execution starts at memory location F000:FFF0h. This address is part of ROM BIOS and contains a jump command to a series of BIOS routines that test and initialize the hardware components, the Power-On-Self-Test or POST.
POST consists of various test- and initialization routines for the on-board hardware and expansion cards such as the video adapter, modem and other similar devices. If a failure is detected this can be made known by:
- one or more audible beeps, which are referred to as beep codes;
- an error message that is displayed on the video screen;
- a checkpoint code, which is sent to one of the system’s output ports.
When all tests have been performed and components have been initialized, control is transferred to the Int 19h Bootstrap Loader, to load the available operating system installed on the systems on hard drive.
A prefix is usually a number or letter at the beginning of a drive model number or serial number that denotes a special characteristic about the drive.
The process of the computer handling, manipulating and modifying data such as arithmetic calculation, file lookup and updating, and word processing.
Modification of playback amplitude due to super-positioning of adjacent flux reversal fields being sensed by the read/write gap.
PULSE DETECT A digital pulse train in which each leading edge or each edge corresponds to a magnetic transition read from the disk. If transition qualification circuitry exists in the drive, this signal is the output of same. Also known as transition detect.