Hard Drive Glossary

Cable Select (CSEL)
An optional feature per ANSI ATA specification (IDE cable connector #28). Your computer’s motherboard must be capable of supporting this feature, plus you need a special IDE cable that is designed for CSEL. On some drives that support CSEL, the enabling jumper number is not a consistent one, check the drive specification sheet for the specific jumper on your model drive.

Drives configured in a multiple drive system are identified by CSEL’s value (assuming a dual drive IDE cable):

    – If CSEL is grounded, then the drive address is 0. This will be the first drive on the IDE cable (the connector in the middle). It is the Primary Drive.
    – If CSEL is open, then the drive address is 1. This will be the drive plugged into the second connector (the last one on the cable). It is the Secondary Drive.

(Also known as a Buffer) An area of DRAM (Dynamic Random Access Memory) on the Disk Drive that temporarily stores recently accessed data, or data that is waiting to be written to the disk. Some drive manufacturers such as Maxtor, have developed their own software to deal with drive cache issues. In Maxtor’s case, they use their “MaxCache Manager Algorithms“, which a truly effective.

Let’s use Maxtor’s MaxCache Manager as an example, as it is representative of how better drives are manufactured.

    Buffer Segmentation:
    The data buffer is organized into two segments: the data buffer and the controller scratch pad. The data buffer is dynamically allocated for read and write data depending on the commands received. A variable number of read and write buffers may exist at the same time.

    Read Ahead Mode:
    Normally, this mode is active. Following a read request, disk read-ahead begins on the first sector and continues sequentially until the allocated buffer is full. If a read request is received during the read-ahead operation, the buffer is examined to determined if the request is in the cache. If a cache hit occurs, read-ahead mode continues without interruption and the host transfer begins immediatly.

    Automatic Write Reallocation (AWR):
    This feature is part of the write cache and reduces the risk of data loss during deferred write operations. If a disk error occurs during the disk write process, the disk task stops and the suspect sector is reallocated to a pool of alternate sectors located at the end of the drive. Following the reallocation, the disk write task continues until it is complete.

    Write Cache Stacking: Normally, this mode is active. Write cache mode accepts the host write data into the buffer until the buffer is full or the host transfer is complete. A command complete interrupt is generated at the end of the transfer.

    A disk write task begins to store the host data to disk. Host write commands continue to be accepted and data transferred to the buffer until either the write command stack is full or the data buffer is full. The drive may reorder write commands to optimize drive throughput.

The amount of data, usually expressed in bytes, which can be stored in a given device or portion of same.

Achieving full capacity of today’s Gigabyte Giants of between 20GB to 80GB with the earlier limitations at 2.1 GB, 4.2 GB and 8.4 GB, can be quite a problem. There are still limitations at these capacity points due to a combination of Hardware, BIOS, and Operating System constraints. In order to overcome these barriers you may need to perform special installation procedures with specialized software, or perhaps upgrade the hardware or the system BIOS (or both) in order to successfully install a drive exceeding these capacities (2.1GB – 4.2GB – 8.4GB) depending upon the operating system being installed. You may want to review our discussion of these Drive Size Capacity Barriers and Limitations.

The heart of the computer system that executes programmed instructions. It includes the arithmetic logic unit (ALU) for performing all math and logic operations, a control section for interpreting and executing instructions, internal memory for temporary storage of program variables and other functions.

A collection of electronic circuits used in the process of writing and reading information to and from magnetic media.

An ordered collection of bits representing one of a set of predefined symbols. Often the term is used interchangeably with byte, but this is inexact.

A control technique that enables the positioning system to correct off-track errors in real time. The actual head position is monitored and compared to the ideal track position to determine any position error that might be occurring. This information is then used to produce a correction signal (feedback) that goes to the positioner to correct the error. (See also Track Following Servo).

A servo control technique that uses position feedback to correct off-track errors. See Track Following Servo.

A group of disk sectors. The smallest allocatable unit of disk storage allowed; each FAT entry represents one cluster. Under FAT16, an average cluster is 16K; under FAT32, clusters are only 4K on partitions up to 8GB.

The original name for the chip that held the system BIOS. So called because this form of Intergrated Circuit can hold the contents of it’s memory with a very small current drain on a battery.

COMPONENT DESIGN LIFE Component design life is defined as

a.) the time period before identified wear-out mechanisms impact the failure rate, or b.) the time period up to the wear-out point at which useful component life expires.

1) An electronic device for connecting one or more mass storage peripherals (rigid disk drives, tape drives, and optical disk drives) to the input/output circuits of a host computer. Controllers vary in complexity, with more sophisticated units able to buffer and schedule commands, correct data errors, and bypass media defects without host intervention.

2) A miniature CPU dedicated to controlling a peripheral device, such as a disk drive, tape drive, video display terminal, or printer. The controller executes commands from the central processing unit and reissues commands to the peripheral device.

An error that can be overcome by the use of Error Detection and Correction.

Hard disk drives are usually made up of multiple platters, or disks, with one read/write head on each surface. So track 0 would be the 1st track on each platter surface. All track 0’s on all platter surfaces would be Cylinder 0.

Cylinder, Head and Sector mode refers to the old standard BIOS (CMOS) setup table. At one time it was a requirement to input of the number of disk drive cylinders (Cyld), heads (Hds), write pre-compensation (WPC), landing zone (LZ), and sectors per track (Sect). As IDE drives have matured, the LZ and WPC were the first parameters to be dropped. They were only used in MFM and RLL drives. Now, very large drives, greater than 8.4 GB, have outgrown the capability of the CHS method of conveying a drives parameters to the computers BIOS. LBA is the current method in use, and it is the best method for breaking inherent Capacity Barriers.

CRC – Cyclic Redundancy Checking Cyclic redundancy checking is a method of checking for errors in data that has been transmitted on a communications link. A sending device applies a 16- or 32-bit polynomial to a block of data that is to be transmitted and appends the resulting cyclic redundancy code (CRC) to the block. The receiving end applies the same polynomial to the data and compares its result with the result appended by the sender. If they agree, the data has been received successfully. If not, the sender can be notified to resend the block of data.

The ITU-TS (CCITT) has a standard for a 16-bit polynomial to be used to obtain the cyclic redundancy code (CRC) that is appended. IBM’s Synchronous Data Link Control and other protocols use CRC-16, another 16-bit polynomial. A 16-bit cyclic redundancy code detects all single and double-bit errors and ensures detection of 99.998% of all possible errors. This level of detection assurance is considered sufficient for data transmission blocks of 4 kilobytes or less. For larger transmissions, a 32-bit CRC is used. The Ethernet and token ring local area network protocols both used a 32-bit CRC.

This is also referred to as 4096 Cylinder Limitation. On some older BIOS’s, primarily those that auto-configure the disk drive, a hang may occur when the drive cylinder value exceeds 4096. The 4096 Cylinder Limitation jumper reduces the capacity in the Identify Drive to 4096 allowing large capacity drives to work with older BIOS’. A BIOS upgrade, BIOS extension or software driver (like Maxtor’s Max*Blast) is required to access the full capacity of the drive. This is an example of just one type of Capacity Barrier.

The outermost cylinder in a drive that can be used for data storage.

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