Hard Drive Glossary


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- A -
To obtain data from, or place data into, RAM, a register, or data storage device.

The interval between the issuing of an access command and the instant that the target data may be read or written. Access time includes seek time, latency and controller overhead time.

This is the moving arm that holds the R/W Heads and accurately positions them, via feedback from the servo system, over the platter surfaces. The actuator is powered by a rotary voice coil.

A number, generally binary, distinguishing a specific member of an ordered set of locations. In disk engineering, the address may consist of drives (unit address), radial positions (cylinder address), or circumferential position (sector address).

The annualized average failure rate (AFR) applies to the period prior to the expiration of component design life. Determination of the AFR takes into account:

a.) In-warranty field failure returns less quality acceptance-related failures and
b.) An AFR equaling an exponentially weighted moving and average monthly failure rate multiplied by 12.

A process of assigning designated areas of the disk to particular files.

A spare track used in the event that a normal track becomes damaged or is unusable.

A signal or system that does not use digital states to convey information. A signal may have any number of significant states (values), contrasted to digital signals which can only have two states.

American National Standards Institute.

A sequence of programmed instructions that tell the computer how to perform some end-user task, such as accounting or word processing.

Bit density (Bits Per Inch) multiplied by track density (Tracks Per Inch) or bits per square inch.

American Standard Code for Information Interchange - Pronounced "ask-ee." A binary code for data that is used in communications, most minicomputers and all personal computers. ASCII is a 7-bit code providing 128 character combinations, the first 32 of which are control characters. Since the common storage unit is an 8-bit byte [256 combinations] and ASCII uses only 7 bits, the extra bit is used differently depending on the computer. For example, the PC uses the additional values for foreign language and graphics symbols. In the MacIntosh, the additional values can be user-defined.

A distortion of the read-back signal which is shown in different intervals between the positive and negative voltage peaks.

The ATA Interface is the dominant storage interface for personal computers. ATA was originally defined as a standard for embedded fixed disk storage on IBM AT™ compatible personal computers. AT™ means "Advanced Technology", which refers primarily to it's then "revolutionary" 16-bit bus. In recent years ATA-3 and ATA-4 have enhanced the functionality of the ATA interface to increase performance and interface a wider range of personal computer storage devices. See the T13 Technical Committee Homepage for details on the latest version. The parent organization for the T13 Committee is the NCITS (National Committee for Information Technology Standards formerly known as X3).

  • ATA Standards: Defines the physical, electrical, transport, and command protocols for the internal attachment of storage devices.


  • ATA-1: A device which complies with the ANSI X3.221-1994 "AT™ Attachment" Interface for Disk Drives - commonly known as IDE.


  • ATA-2: A device which complies with the ANSI X3.279-1995 "AT™ Attachment" Interface for Disk Drives - also known as Fast ATA or Enhanced IDE (EIDE).


  • Apple-ATA: Apple's implementation of the ATA interface is a subset of the ATA interface specification, ANSI proposal X3T9.2/90-143. Revision 3.1. This subset requires the IDE drive to support LBA mode.


  • ATA-3: A device which complies with the ANSI X3.298-1997, "AT™ Attachment-3" Interface for Disk Drives - also known as Fast ATA or EIDE.


  • ATAPI: "AT™ Attachment Packet Interface" is an extension to the ATA protocol which defines a packet protocol for devices such as CD-ROM and Tape devices. The ATAPI protocol allows these devices to share the ATA bus with traditional ATA disk drives.


  • ATA/ATAPI-4: "AT™ Attachment with Packet Interface" is the combined ATA-4 and ATAPI protocol document. Complies with the ANSI X3T13/D96153 - also known as Ultra ATA or Ultra DMA. This is the version that supports up to 33MB/sec data transfers (in burst mode).


  • ATA/ATAPI-5: "AT™ Attachment with Packet Interface" is the latest protocol proposal. This is the version that will support up to 66MB/sec data transfers (in burst mode). Enhances data integrity and reliability through internal data checking and correction algorithms. Also includes a new UDMA "Ground Bus" 80-wire cable requirement.

  • EBIOS: Enhanced BIOS Services for Disk Drives - This T13 Technical Project Report describes new BIOS firmware services to support ATA hard disks up to 16 mega-tera-bytes (16x1018). This primarily refers to "Extended Interrupt 13". Older BIOS services have a compatibility limitation of 528 MB and a theoretical maximum capacity of 8.4 GB.
AT™ is a Registered Trademark of IBM®

Memory other than main memory; generally a mass-storage subsystem containing disk drives and backup tape drives, controller(s) and buffer memory (also called peripheral memory).

The average time to make all possible length accesses (seeks).

The average time to make all possible length seeks. A typical measure of performance. This specification is determined by the average of 10,000 random seek times as measured on independent test equipment, and not through the use of "off the shelf" performance software, i.e. Coretest, PC mag, Ontrack, Norton etc. The best overall test equipment used to perform these tests is manufactured by FLEXSTAR. Flexstar test equipment is well known, and widely used throughout the industry. For a drive to meet published specifications, it cannot exceed the seek time specified for that drive. If a drive is above the specified seek time it will fail the testing and be rejected. Off the shelf software creates its own overhead time and is usually inconsistent.

- B -
A Block of data that is reported by the operating system as flawed.

A Sector on the surface of the drive is reported by the operating system as flawed.

Most major hard drive manufacturers employ Defect Management to reduce the amount of possible bad sectors on new drives. Usually defective sectors or tracks are retired and data is written in alternate locations. Bad sectors should occur only infrequently if your drive is functioning properly. When you format a disk, the operating system identifies any bad sectors on the disk and marks them so they will not be used. If a sector that already contains data becomes damaged, you will need special software to recover the data. Quite often reported bad sectors are not physically damaged, they can be revived by performing a Low Level Format on the hard drive (Note however, this will erase all data). One of the better free Low Level Format programs can be obtained from Maxtor, who developed it just for this purpose.

An abbreviation for binary digit, of which there are two (0 and 1). A bit is the basic data unit of most digital computers. A bit is usually part of a data byte or word, but bits may be used singly to control or read logic "on-off" functions. The fundamental unit information, often used loosely to refer to a circuit or magnetization state at a particular instant in time.

Acronym for "Basic Input/Output System" (also known as CMOS). The firmware area of a CPU that controls operations through the system bus and to the attached cards and peripheral devices. Located in the BIOS ROM, This is normally located in an EEPROM (Electrically-Erasable Read-Only Memory) chip. The BIOS EEPROM is socketed on the motherboard and is relatively easy to locate. It's usually labelled with the name of the BIOS manufacturer. Most times this is Award, American Megatrends (AMI) or Phoenix. There is also often a version number or date on the chip.

Acronym for "Bits Per Inch". See areal density.

A group of bytes handled, stored, and accessed as a logical data unit, such as an individual file record.

BUFFER A temporary data storage area that compensates for a difference in data transfer rates and/or data processing rates between sender and receiver. See Cache.

A collection of functionally parallel conductors that forms an interconnection between functional blocks in a digital device. A length of parallel conductors that forms a major interconnection route between the computer system CPU (central processing unit) and its peripheral subsystems. Depending on its design, a bus may carry data, addresses, power, and more.

Typical IDE and EIDE adapter cards use the AT bus (16 bit). In order to use the Ultra-DMA interface to it's fullest capacity, you need either a motherboard chipset (i430TX or equivalent), or a PCI (32 bit) adapter card that supports Ultra-DMA.

An ordered collection of bits treated as a unit. Most often, a byte is understood to consist of eight bits. One byte is necessary to define an alphanumeric character.

- C -
Cable Select (CSEL)
An optional feature per ANSI ATA specification (IDE cable connector #28). Your computer's motherboard must be capable of supporting this feature, plus you need a special IDE cable that is designed for CSEL. On some drives that support CSEL, the enabling jumper number is not a consistent one, check the drive specification sheet for the specific jumper on your model drive.

Drives configured in a multiple drive system are identified by CSEL's value (assuming a dual drive IDE cable):

    - If CSEL is grounded, then the drive address is 0. This will be the first drive on the IDE cable (the connector in the middle). It is the Primary Drive.
    - If CSEL is open, then the drive address is 1. This will be the drive plugged into the second connector (the last one on the cable). It is the Secondary Drive.

(Also known as a Buffer) An area of DRAM (Dynamic Random Access Memory) on the Disk Drive that temporarily stores recently accessed data, or data that is waiting to be written to the disk. Some drive manufacturers such as Maxtor, have developed their own software to deal with drive cache issues. In Maxtor's case, they use their "MaxCache Manager Algorithms", which a truly effective.

Let's use Maxtor's MaxCache Manager as an example, as it is representative of how better drives are manufactured.

    Buffer Segmentation:
    The data buffer is organized into two segments: the data buffer and the controller scratch pad. The data buffer is dynamically allocated for read and write data depending on the commands received. A variable number of read and write buffers may exist at the same time.

    Read Ahead Mode:
    Normally, this mode is active. Following a read request, disk read-ahead begins on the first sector and continues sequentially until the allocated buffer is full. If a read request is received during the read-ahead operation, the buffer is examined to determined if the request is in the cache. If a cache hit occurs, read-ahead mode continues without interruption and the host transfer begins immediatly.

    Automatic Write Reallocation (AWR):
    This feature is part of the write cache and reduces the risk of data loss during deferred write operations. If a disk error occurs during the disk write process, the disk task stops and the suspect sector is reallocated to a pool of alternate sectors located at the end of the drive. Following the reallocation, the disk write task continues until it is complete.

    Write Cache Stacking:
    Normally, this mode is active. Write cache mode accepts the host write data into the buffer until the buffer is full or the host transfer is complete. A command complete interrupt is generated at the end of the transfer.

    A disk write task begins to store the host data to disk. Host write commands continue to be accepted and data transferred to the buffer until either the write command stack is full or the data buffer is full. The drive may reorder write commands to optimize drive throughput.

The amount of data, usually expressed in bytes, which can be stored in a given device or portion of same.

Achieving full capacity of today's Gigabyte Giants of between 20GB to 80GB with the earlier limitations at 2.1 GB, 4.2 GB and 8.4 GB, can be quite a problem. There are still limitations at these capacity points due to a combination of Hardware, BIOS, and Operating System constraints. In order to overcome these barriers you may need to perform special installation procedures with specialized software, or perhaps upgrade the hardware or the system BIOS (or both) in order to successfully install a drive exceeding these capacities (2.1GB - 4.2GB - 8.4GB) depending upon the operating system being installed. You may want to review our discussion of these Drive Size Capacity Barriers and Limitations.

The heart of the computer system that executes programmed instructions. It includes the arithmetic logic unit (ALU) for performing all math and logic operations, a control section for interpreting and executing instructions, internal memory for temporary storage of program variables and other functions.

A collection of electronic circuits used in the process of writing and reading information to and from magnetic media.

An ordered collection of bits representing one of a set of predefined symbols. Often the term is used interchangeably with byte, but this is inexact.

A control technique that enables the positioning system to correct off-track errors in real time. The actual head position is monitored and compared to the ideal track position to determine any position error that might be occurring. This information is then used to produce a correction signal (feedback) that goes to the positioner to correct the error. (See also Track Following Servo).

A servo control technique that uses position feedback to correct off-track errors. See Track Following Servo.

A group of disk sectors. The smallest allocatable unit of disk storage allowed; each FAT entry represents one cluster. Under FAT16, an average cluster is 16K; under FAT32, clusters are only 4K on partitions up to 8GB.

The original name for the chip that held the system BIOS. So called because this form of Intergrated Circuit can hold the contents of it's memory with a very small current drain on a battery.

Component design life is defined as

a.) the time period before identified wear-out mechanisms impact the failure rate, or
b.) the time period up to the wear-out point at which useful component life expires.

1) An electronic device for connecting one or more mass storage peripherals (rigid disk drives, tape drives, and optical disk drives) to the input/output circuits of a host computer. Controllers vary in complexity, with more sophisticated units able to buffer and schedule commands, correct data errors, and bypass media defects without host intervention.

2) A miniature CPU dedicated to controlling a peripheral device, such as a disk drive, tape drive, video display terminal, or printer. The controller executes commands from the central processing unit and reissues commands to the peripheral device.

An error that can be overcome by the use of Error Detection and Correction.

Hard disk drives are usually made up of multiple platters, or disks, with one read/write head on each surface. So track 0 would be the 1st track on each platter surface. All track 0's on all platter surfaces would be Cylinder 0.

Cylinder, Head and Sector mode refers to the old standard BIOS (CMOS) setup table. At one time it was a requirement to input of the number of disk drive cylinders (Cyld), heads (Hds), write pre-compensation (WPC), landing zone (LZ), and sectors per track (Sect). As IDE drives have matured, the LZ and WPC were the first parameters to be dropped. They were only used in MFM and RLL drives. Now, very large drives, greater than 8.4 GB, have outgrown the capability of the CHS method of conveying a drives parameters to the computers BIOS. LBA is the current method in use, and it is the best method for breaking inherent Capacity Barriers.

CRC - Cyclic Redundancy Checking
Cyclic redundancy checking is a method of checking for errors in data that has been transmitted on a communications link. A sending device applies a 16- or 32-bit polynomial to a block of data that is to be transmitted and appends the resulting cyclic redundancy code (CRC) to the block. The receiving end applies the same polynomial to the data and compares its result with the result appended by the sender. If they agree, the data has been received successfully. If not, the sender can be notified to resend the block of data.

The ITU-TS (CCITT) has a standard for a 16-bit polynomial to be used to obtain the cyclic redundancy code (CRC) that is appended. IBM's Synchronous Data Link Control and other protocols use CRC-16, another 16-bit polynomial. A 16-bit cyclic redundancy code detects all single and double-bit errors and ensures detection of 99.998% of all possible errors. This level of detection assurance is considered sufficient for data transmission blocks of 4 kilobytes or less. For larger transmissions, a 32-bit CRC is used. The Ethernet and token ring local area network protocols both used a 32-bit CRC.

This is also referred to as 4096 Cylinder Limitation. On some older BIOS's, primarily those that auto-configure the disk drive, a hang may occur when the drive cylinder value exceeds 4096. The 4096 Cylinder Limitation jumper reduces the capacity in the Identify Drive to 4096 allowing large capacity drives to work with older BIOS'. A BIOS upgrade, BIOS extension or software driver (like Maxtor's Max*Blast) is required to access the full capacity of the drive. This is an example of just one type of Capacity Barrier.

The outermost cylinder in a drive that can be used for data storage.

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